Saturday, June 21, 2025 – Tokyo, Japan (co-located with ISCA 2025)
Location
Room 40-1F (GCS)
— Building 40, 1st Floor, Green Computing Systems Building
(Directions from the Registration Desk)
Program
8:30-9:00: Opening Remarks
9:00-10:00: Session I – Architecture (Session Chair: Luca Carloni)
1. Naoya Hatta, Taichi Ishitani and Nathaniel Bleier
Veryl: A Modern Hardware Description Language for Open-Source Computer Architecture
2. Nicholas Mosier, Hamed Nemati, John Mitchell and Caroline Trippel
Fast, Accurate, and Novel Performance Evaluations with PinCPU
3. Gokulakrishnan Ranghamannar, Gopalakrishnan Srinivasan and Karthik Sankaranarayanan
Efficient Open-source RISC-V Trace Generation for Enabling Reuse in Computer Architecture Research
10:00-11:00: Session II –
Security and Validation (Session Chair: Margaret Martonosi)
1. Yao Hsiao, Nikos Nikoleris, Artem Khyzha, Dominic P. Mulligan, Gustavo Petri, Christopher W. Fletcher
and Caroline Trippel
Automatically Uncovering Hardware Side-Channels in Processor RTL with Multi-μPATH Synthesis
2. Adam Quinn
An Open-Source Framework for Rapid Validation of Scientific ASICs
3. Tuo Chen, Reoma Matsuo, Ryota Shioya and Kuniyasu Suzaki
Speculative Store Bypass Vulnerability in a Memory Dependence Predictor-Equipped RISC-V Processor
11:00-11:30: Coffee Break
11:30-13:00: Session III - Accelerators (Session Chair: Sophia Shao)
1. Siyuan Chen and Ken Mai
DLAGen: an Open-Source Model-to-Layout Generator for Deep Learning Accelerators
2. Jude Haris and José Cano
SECDA Design Suite: Efficient Hardware-Software Co-Design of DNN Accelerators
3. Michele Fiorito, Serena Curzel and Fabrizio Ferrandi
Automated Co-Simulation for Functional and System-Level Verification of HLS Accelerators
4. Julian Pavon, Ivan Vargas Valdivieso, Osman Unsal and Adrian Cristal
Lumina: A Unified Tool for Functional and Profiling Analysis of LLMs Across Hardware Platforms
13:00-14:00: Lunch
14:00-15:30: Session IV – Miscellaneous (Session Chair: Caroline Trippel)
1. Udit Subrmanya, Rahul Raj, Jeff Young and Hyesoon Kim
Deploying Vortex FPGA development environment with Apptainer
2. Qihang Wu and Austin Rovinski
Revisiting Hardware Priority Queue Architectures
3. Woocheol Jung, Junryul Yang and Sangkyun Yun
Automatic Generation of Processor Design from Instruction Set Architecture
4. Yimin Gu, Hans Baier, Angelo Jacobo, Edmund Humenberger
All Open Source FPGA Toolchain for ZYNQ 7000 SoCs
15:30-15:45: Poster Session Lightning Talks
15:45-16:30: Poster Session with Coffe Break
1. Hiroki Yamada, Takeshi Kamiyama, Masato Oguchi and Saneyasu Yamaguchi
Garbage Collection Time Reduction Method Based on Allocation Control Using Object Size
2. Julian Pavon, Ivan Vargas Valdivieso, Santiago Montserrat Campanello, Osman Unsal and Adrian Cristal
A Flexible Tracing Solution for Fast Simulation and Analysis in RISC-V
3. Ryan Marsala, Yerzhan Mustafa, Prabhath Tangella, George Michelogiannakis, Selcuk Kose, Adwait Jog
and Mehmet E. Belviranli
An End-to-end Simulation Framework for Cryogenic Computing Systems
4. Yuya Ishikawa and Saneyasu Yamaguchi
Performance Evaluation of Page Cache Management in Multi-Generation LRU
5. Sonam Singh, Sneha Agarwal and Sujay Deb
Sparsity-Aware Acceleration of Spiking Neural Networks on RISC-V Based Multi-Core Systems
6. Arvin Delavari and Faraz Ghoreishy
Automated Energy-Efficiency Control Strategy in a Reconfigurable Embedded RISC-V Core
7. Mohamed El-Hadedy, Wen-Mei Hwu and Benny Cheng
Thoth: Open-Source Kubernetes Orchestration of Dilithium and Kyber for Quantum-Resilient Multi-
Architecture Clusters
8. Faraz Ghoreishy, Soroush Meghdadizanjani and Saleh Khalaj Monfared
Work in Progress: A HW/SW Co-design for Bit-Sliced Packed-SIMD Execution in RISC-V
16:30-17:30: Session V – Frameworks and Platforms (Session Chair: Pradip Bose)
1. Gabriel Rodriguez Canal, Vito Giovanni Castellana, Nicolas Bohm Agostini, Ankur Limaye, Marco
Minutoli, Max Ramstad, Joseph Manzano, Antonino Tumeo, Giovanni Gozzi, Michele Fiorito, Serena
Curzel and Fabrizio Ferrandi
Synthesizing dataflow architectures with SODA
2. Pasquale Davide Schiavone, Luigi Giuffrida, Maurizio Martina, Jose Miranda, Andres Otero, Francesco
Conti, Davide Rossi, David Atienza, Frank Gurkaynak and Luca Benini
The Power of Open-Source Hardware: a user experience point of view
3. Gabriele Tombesi, Joseph Zuckerman, Je Yang, William Baisi, Kevin Lee, Davide Giri, and Luca P. Carloni
An Open-Source DNN Acceleration Fabric with Flexible Inter-Layer Pipelining Support
17:30-18:00 : All-Hands Discussion and Concluding Remarks (Session Chair: Luca Carloni)