OSCAR 2023 Workshop - Program

9:00-9:20: Opening Remarks

• Pradip Bose and Luca Carloni

9:20-11:00: Session I - FPGA-Based Design & FPGA Components

1. Khyati Kiyawat, Sergiu Mosanu, Mircea Stan and Kevin Skadron
     Open-Source Processing-in-Memory Architecture Design through FPGA Emulation: A Case Study Modeling Sieve
   
   
   
2. Allen Boston, Roman Gauchi and Pierre-Emmanuel Gaillardon
   Programming Management Unit: Open-Source Core for Secure FPGA Bitstream Configuration
   
   
   
3. Ang Li, Ting-Jung Chang, Fei Gao and David Wentzlaff
   Open-Source FPGA on Silicon: Case Studies on PRGA, an Open-Source Framework for Building & Programming Custom FPGAs
   
   
   
4. Javier Campos, Zhen Dong, Javier Duarte, Amir Gholaminejad, Michael Mahoney, Jovan Mitrevski and Nhan Tran
   End-to-End Codesign of Hessian-Aware Quantized Neural Networks for FPGAs and ASICs
   
   
   
5. Aman Arora and Lizy John
   Koios: Open-Source Deep Learning Benchmarks for FPGA Research
   
   
   
   

11:00-11:20: Coffe Break

11:20-12:40: Session II – Applications & Tools

1. Nuzhat Yamin, Dina Hussein and Ganapati Bhat
     Towards Open Source Platforms for Wearable Health Monitoring
   
   
   
2. Maximilian Bremer, Nirmalendu Patra, Tan Nguyen, Cy Chan and Dilip Vasudevan
   Accelerating Open-Source Hardware Simulation Using Optimistic Parallel Discrete Event Simulation
   
   
   
3. Yingjie Li, Alan Mishchenko and Cunxi Yu
   Verilog-to-PyG: A Framework for Graph Learning and Argumentation on RTL Designs
   
   
   
4. Jason Lowe-Power
   Sustaining Research-Focused Open-Source Hardware Projects
   
   
   

12:40-14:00: Lunch

14:00-15:20: Session III – Compilation & Design-Space Exploration

1. Yuto Nishida, Sahil Bhatia, Shadaj Laddad, Hasan Genc, Sophia Shao and Alvin Cheung
     Code Transpilation for Hardware Accelerators
   
   
   
2. Cheng Tan, Nicolas Bohm Agostini, Ankur Limaye, Serena Curzel, Marco Minutoli, Vito Giovanni Castellana, Joseph Manzano, Ang Li and Antonino Tumeo
   SO(DA)^2: Software Defined Architectures for Data Analytics
   
   
   
3. Zhigang Wei, Aman Arora, Ruihao Li and Lizy John
   ML4Accel: An Open-Source Dataset for ML-Guided Accelerator Design
   
   
   
4. Giuseppe Maria Sarda, Nimish Shah, Debjyoti Bhattacharjee, Peter Debacker and Marian Verhelst
   HW-Aware Mapping of Graph Neural Networks on RISC-V GPGPU: A Work-in-Progress
   
   
   

15:20-16:20: Poster Session (with introductory lightning talks and coffee break)

1. Stefan Huemer, Ahmad Sedigh Baroughi, Hadi Shahriar Shahhoseini and Nima Taherinejad
   AxE: an ApproXimate-Exact MPSoC Platform
   
   
   
2. Luca Collini, Joey Ah-Kiow, Christian Pilato, Ramesh Karri and Benjamin Tan
   Identifying Security Concerns in IP Designs Generated by High-Level Synthesis
   
   
   
3. Mircea Stan and Kevin Skadron
   Twenty Years Later - HotSpot at 20
   
   
   
4. Mattis Hasler
   RoadRunner: A Modularized Hardware Design Management and EDA Tool Runner
   
   
   
5. Yao Hsiao, Nikos Nikoleris, Artem Khyzha, Christopher W. Fletcher, Caroline Trippel
   Formal Characterization of Hardware Transmitters
   
   
   
6. Saranyu Chattopadhyay, Caroline Trippel, Clark Barrett and Subhasish Mitra
   Generalized QED Pre-silicon Verification beyond Non-Interfering Hardware Accelerators
   
   

16:20-17:40: Session IV – Accelerators & Memory Optimization

1. Kavya Sreedhar, Mark Horowitz and Christopher Torng
   A Fast Open-Source Extended GCD Accelerator
   
   
   
2. Yanwen Xu, Ang Li and Tyler Sorensen
   Evaluating Shared Memory Heterogeneous Systems Using Traverse-Compute Workloads
   
   
   
3. Jerry Zhao, Seah Kim, Borivoje Nikolić, Krste Asanovic and Yakun Sophia Shao
   An Open-source Framework for Virtualized and Disaggregated RISC-V Accelerators
   
   
   
4. Kevin Yunchuan Jiang, Joseph Zuckerman and Luca P. Carloni
   Pipelining an Open-Source Last-Level Cache
   
   

17:40-18:00: All-Hands Discussion and Concluding Remarks